Phase Noise Behaviour of Fractional-N Synthesizers with ∆Σ Dithering for Multi-Radio Mobile Terminals
نویسندگان
چکیده
This paper presents phase noise behaviour and design aspects of PLL based frequency synthesizers with ∆Σ dithering for cognitive multi-radio mobile terminals. Principal features of PLL based frequency synthesizers and 1-bit ∆Σ dithering are presented and simulated. Moreover, frequency synthesizer requirements for main standards in the frequency band 800 MHz to 6 GHz are investigated as well.
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